mux Project Status
Project File: zadatak2.xise Parser Errors: No Errors
Module Name: mux Implementation State: New
Target Device: xc3s1200e-5fg320
  • Errors:
  
Product Version:ISE 14.7
  • Warnings:
  
Design Goal: Balanced
  • Routing Results:
  
Design Strategy: Xilinx Default (unlocked)
  • Timing Constraints:
  
Environment:  
  • Final Timing Score:
   
 
Detailed Reports [-]
Report NameStatusGenerated ErrorsWarningsInfos
Synthesis Report     
Translation Report     
Map Report     
Place and Route Report     
Power Report     
Post-PAR Static Timing Report     
Bitgen Report     
 
Secondary Reports [-]
Report NameStatusGenerated
ISIM Simulator LogCurrentMon Aug 30 03:37:02 2021

Date Generated: 04/29/2022 - 08:14:07