Register Project Status
Project File: Reg_1.xise Parser Errors: No Errors
Module Name: Register Implementation State: New
Target Device: xa95*xl-**
  • Errors:
  
Product Version:ISE 14.7
  • Warnings:
  
Design Goal: Balanced
  • Routing Results:
  
Design Strategy: Xilinx Default (unlocked)
  • Timing Constraints:
  
Environment:  
  • Final Timing Score:
   
 
Detailed Reports [-]
Report NameStatusGenerated ErrorsWarningsInfos
Synthesis Report     
Translation Report     
CPLD Fitter Report (Text)     
Power Report     
 
Secondary Reports [-]
Report NameStatusGenerated
ISIM Simulator LogCurrentTue May 16 19:42:40 2023
Post-Fit Simulation Model Report  

Date Generated: 04/29/2022 - 23:11:58