RegisterFile Project Status | |||
Project File: | Reg_3.xise | Parser Errors: | X 1 Error |
Module Name: | RegisterFile | Implementation State: | New |
Target Device: | xa95*xl-** |
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Product Version: | ISE 14.7 |
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Design Goal: | Balanced |
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Design Strategy: | Xilinx Default (unlocked) |
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Environment: |
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Detailed Reports | [-] | |||||
Report Name | Status | Generated | Errors | Warnings | Infos | |
Synthesis Report | ||||||
Translation Report | ||||||
CPLD Fitter Report (Text) | ||||||
Power Report |
Secondary Reports | [-] | ||
Report Name | Status | Generated | |
Post-Fit Simulation Model Report |