Device Usage Page (usage_statistics_webtalk.html)

This HTML page displays the device usage statistics that will be sent to Xilinx.
 

 
Software Version and Target Device
Product Version: ISE:14.7 (WebPack) - P.20131013 Target Family: Spartan3E
OS Platform: NT64 Target Device: xc3s1200e
Project ID (random number) 483d0ccdc59d4ac68b441645077cdc49.57837F771B6F43FA8AAE48EAB4B3A723.1 Target Package: fg320
Registration ID 211015186_0_0_833 Target Speed: -5
Date Generated 2017-04-04T10:50:43 Tool Flow ISE
 
User Environment
OS Name Microsoft Windows 7 , 64-bit OS Release major release (build 7600)
CPU Name Intel(R) Core(TM) i3 CPU M 330 @ 2.13GHz CPU Speed 2128 MHz
 
Device Usage Statistics
Macro StatisticsMiscellaneous StatisticsNet StatisticsSite Usage
  MiscellaneousStatistics
  • AGG_BONDED_IO=4
  • AGG_IO=4
  • AGG_SLICE=1
  • NUM_4_INPUT_LUT=1
  • NUM_BONDED_IBUF=3
  • NUM_BONDED_IOB=1
  • NUM_SLICEL=1
NetStatistics
  • NumNets_Active=8
  • NumNodesOfType_Active_DOUBLE=4
  • NumNodesOfType_Active_DUMMY=3
  • NumNodesOfType_Active_DUMMYESC=3
  • NumNodesOfType_Active_INPUT=4
  • NumNodesOfType_Active_IOBOUTPUT=3
  • NumNodesOfType_Active_OMUX=2
  • NumNodesOfType_Active_OUTPUT=1
  • NumNodesOfType_Active_VUNIHEX=1
SiteStatistics
  • IOB-DIFFS=1
SiteSummary
  • IBUF=3
  • IBUF_INBUF=3
  • IBUF_PAD=3
  • IOB=1
  • IOB_OUTBUF=1
  • IOB_PAD=1
  • SLICEL=1
  • SLICEL_G=1
 
Configuration Data
IBUF_PAD
  • IOATTRBOX=[LVCMOS25:3]
IOB
  • O1=[O1_INV:0] [O1:1]
IOB_OUTBUF
  • IN=[IN_INV:0] [IN:1]
IOB_PAD
  • DRIVEATTRBOX=[12:1]
  • IOATTRBOX=[LVCMOS25:1]
  • SLEW=[SLOW:1]
 
Pin Data
IBUF
  • I=3
  • PAD=3
IBUF_INBUF
  • IN=3
  • OUT=3
IBUF_PAD
  • PAD=3
IOB
  • O1=1
  • PAD=1
IOB_OUTBUF
  • IN=1
  • OUT=1
IOB_PAD
  • PAD=1
SLICEL
  • G1=1
  • G2=1
  • G3=1
  • Y=1
SLICEL_G
  • A1=1
  • A2=1
  • A3=1
  • D=1
 
Tool Usage
Command Line History
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s1200e-fg320-5 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc3s1200e-fg320-5 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 5 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
 
Software Quality
Run Statistics
Program NameRuns StartedRuns FinishedErrorsFatal ErrorsInternal ErrorsExceptionsCore Dumps
XSLTProcess 1 1 0 0 0 0 0
bitgen 6 6 0 0 0 0 0
cpldfit 1 1 0 0 0 0 0
hprep6 1 1 0 0 0 0 0
map 19 19 0 0 0 0 0
netgen 1 1 0 0 0 0 0
ngcbuild 1 1 0 0 0 0 0
ngdbuild 25 25 0 0 0 0 0
obngc 1 1 0 0 0 0 0
par 20 20 0 0 0 0 0
taengine 1 1 0 0 0 0 0
trce 20 20 0 0 0 0 0
tsim 1 1 0 0 0 0 0
xst 49 49 0 0 0 0 0
 
Project Statistics
PROP_Enable_Message_Filtering=false PROP_FitterReportFormat=HTML
PROP_LastAppliedGoal=Balanced PROP_LastAppliedStrategy=Xilinx Default (unlocked)
PROP_ManualCompileOrderImp=false PROP_PropSpecInProjFile=Store all values
PROP_Simulator=ISim (VHDL/Verilog) PROP_SynthTopFile=changed
PROP_Top_Level_Module_Type=Schematic PROP_UseSmartGuide=false
PROP_UserConstraintEditorPreference=Text Editor PROP_intProjectCreationTimestamp=2017-04-04T09:58:11
PROP_intWbtProjectID=57837F771B6F43FA8AAE48EAB4B3A723 PROP_intWbtProjectIteration=1
PROP_intWorkingDirLocWRTProjDir=Same PROP_intWorkingDirUsed=No
PROP_lockPinsUcfFile=changed PROP_AutoTop=true
PROP_DevFamily=Spartan3E PROP_DevDevice=xc3s1200e
PROP_DevFamilyPMName=spartan3e PROP_DevPackage=fg320
PROP_Synthesis_Tool=XST (VHDL/Verilog) PROP_DevSpeed=-5
PROP_PreferredLanguage=Verilog FILE_SCHEMATIC=1
FILE_UCF=1
 
Unisim Statistics
NGDBUILD_PRE_UNISIM_SUMMARY
NGDBUILD_NUM_AND2=1 NGDBUILD_NUM_IBUF=3 NGDBUILD_NUM_OBUF=1 NGDBUILD_NUM_OR2=1
NGDBUILD_POST_UNISIM_SUMMARY
NGDBUILD_NUM_AND2=1 NGDBUILD_NUM_IBUF=3 NGDBUILD_NUM_OBUF=1 NGDBUILD_NUM_OR2=1
 
XST Command Line Options
XST_OPTION_SUMMARY
-ifn=<fname>.prj -ifmt=mixed -ofn=<design_top> -ofmt=NGC
-p=xc3s1200e-5-fg320 -top=<design_top> -opt_mode=Speed -opt_level=1
-iuc=NO -keep_hierarchy=No -netlist_hierarchy=As_Optimized -rtlview=Yes
-glob_opt=AllClockNets -read_cores=YES -write_timing_constraints=NO -cross_clock_analysis=NO
-bus_delimiter=<> -slice_utilization_ratio=100 -bram_utilization_ratio=100 -verilog2001=YES
-fsm_extract=YES -fsm_encoding=Auto -safe_implementation=No -fsm_style=LUT
-ram_extract=Yes -ram_style=Auto -rom_extract=Yes -shreg_extract=YES
-rom_style=Auto -auto_bram_packing=NO -resource_sharing=YES -async_to_sync=NO
-mult_style=Auto -iobuf=YES -max_fanout=500 -bufg=24
-register_duplication=YES -register_balancing=No -optimize_primitives=NO -use_clock_enable=Yes
-use_sync_set=Yes -use_sync_reset=Yes -iob=Auto -equivalent_register_removal=YES
-slice_utilization_ratio_maxmargin=5